Integrated circuits generally comprise, adjacent their front face, an interconnection network (BEOL: Back End Of Line) comprising metal lines. In order to form an electrical link between metal lines of two integrated circuits assembled front face against back face (or “back to front”), electrically conducting through-vias are formed, commonly denoted by the acronym TSV: Through Silicon Via. These links can be formed prior to the fabrication of the interconnection network of the integrated circuit, by forming a conducting pillar from the front face of the integrated circuit extending into the silicon substrate, then by thinning this substrate from its back face, the pillar then being exposed on the new back face. The electrically conducting through-via thus formed is a link of the “TSV Middle” type according to a terminology known to those skilled in the art.
It is also possible to fabricate an electrically conducting through-via after the formation of the interconnection network (approach referred to as “TSV Last”). In order to fabricate such an electrically conducting through-via, the silicon substrate is thinned from its back face so as to form a new back face. A new cavity is then formed on this back face opening onto a line of the interconnection network and an electrically conducting layer is formed on the sidewalls of the cavity in contact with the line, bringing an electrical contact onto the new back face.
During the thinning steps allowing the formation of the electrically conducting through-vias, the integrated circuits from the same semiconductor wafer are assembled with a wafer forming a rigid support or a handle. Typically, the wafer forming a rigid support is fixed by way of an adhesive on the front face of the integrated circuits. This front face can be covered with copper pillars and it is therefore necessary to use a layer of adhesive covering these pillars.
After the fixing to a rigid support by an adhesive, it may be difficult to implement fabrication steps at high temperatures, for example, greater than 250° Celsius. Furthermore, once the integrated circuit is completed, the step for removal of the rigid support may damage the integrated circuits. One approach is to slide the rigid support towards the outside during an anneal step. Drawbacks of this approach may comprise that it allows thinning of the semiconductor supports by around only 80 micrometers in thickness, and it may require cleaning of the layer of adhesive.
Another approach may comprise using a rigid support having a plurality of cavities through which a chemical agent capable of cleaning the adhesive is passed in order to detach the support. This approach may have limitations in temperature due to the use of adhesive.